Session Th-C4

a-Si:H Heterostructures and Solar Cells

Chair: Stephen O'Leary, University of British Columbia-Kelowna

Th-C4.1 15:50–16:10

Ultra High Quality Amorphous-Crystalline Silicon Heterostructures Prepared by Grid-Biased Triode RF PECVD

Pratish Mahtani (1), Keith R. Leong (1), Bastien Jovet (1), Davit Yeghikyan (1), and Nazir P. Kherani (1,2)

1. Department of Electrical and Computer Engineering, University of Toronto, 10 King's College Road, Toronto, Ontario, M5S 3G4, Canada

2. Department of Materials Science and Engineering, University of Toronto, 184 College St., Toronto, Ontario M5S 3E4, Canada

Recently, there has been a paradigm shift in silicon photovoltaics with the development of Silicon Hetero-Junction (SHJ) solar cells. The SHJ technology is a low-cost, low-temperature method of fabricating state-of-the-art solar cells, with reported efficiencies as high as ~25% [1]. As opposed to traditional crystalline silicon (c-Si) homojunction solar cells which use high temperature diffusion processes (~1000°C) to form the emitter and back-surface regions, these regions in SHJ solar cells are formed by depositing doped and intrinsic bi-layers of hydrogenated amorphous silicon (a-Si:H) onto the c-Si wafer using low-temperature (< 200°C) plasma enhanced chemical vapour deposition (PECVD). In addition to forming the charge separating junction, a-Si:H also provides excellent chemical passivation of the c-Si surface reducing the interface defect density and thus achieving very high open circuit voltages (Voc) in the device. Further, by using low temperature processes the SHJ technology is compatible with ultra-thin sub-100 μm platforms.

In our pursuit of developing low-cost high-efficiency thin silicon heterojunction solar cells, we have applied the grid-biased triode RF PECVD method for synthesizing ultra-high quality amorphous-crystalline silicon heterojunctions [2]. While the triode RF PECVD method has been applied previously to p-i-n homojunction a-Si:H solar cells [3], for the first time we have demonstrated that this triode RF PECVD method has significant advantages compared with the traditional diode RF PECVD method for synthesizing SHJ solar cells. Using this method, we have demonstrated state-of-the-art surface passivation of c-Si with effective minority carrier lifetime of 7 ms and surface recombination velocity of 2 cm/s on float-zone 1–2 Ωcm 280 μm (100) c-Si wafers. Furthermore, we have demonstrated that the bulk properties of a-Si:H films deposited using this method are superior to those deposited by the typical diode PECVD method, with the bulk a-Si:H films showing a 50% reduction in microstructure parameter and a 12% relative reduction in hydrogen content. Together these improvements suggest a higher Voc and fill factor (FF) when applied to a SHJ solar cell.

In this presentation we will provide an overview of the grid-biased triode RF PECVD method and discuss the most recent state-of-the-art results we have achieved.

[1] Panasonic Corporation. (2012 Feb. 12). Panasonic HIT Solar Cell Achieves World's Highest Conversion Efficiency of 24.7% at Research Level [Press Release]. Retrieved from:

[2] P. Mahtani, et al., Journal of Non-Crystalline Solids, 358 (2012) 3396-3402

[3] S. Shimizu, et al., J. Appl. Phys., 101 (2007) 064911

Keywords: amorphous silicon, heterojunction, photovoltaics, solar cells

Th-C4.2 16:10–16:30

Nano and Microcrystalline Si Heterojunctions with Si by Opto-Thermal Processes

Christopher Baldus-Jeursen, Roohollah Tarighat, Ehsanollah Fathi, and Siva Sivoththaman

Centre for Advanced Photovoltaic Devices and Systems, Department of Electrical and Computer Engineering, University of Waterloo, 200 University Avenue West, Waterloo, Ontario, N2L 3G1

Nanocrystalline silicon is an excellent substitute for a-Si:H in heterojunction devices. Ideally, the nanocrystalline film should be formed using a simple, high-throughput process. In this work, a-Si:H of approximately 50 nm thickness was deposited onto silicon substrates, (100) orientation, by RF PECVD at a frequency of 13.56 MHz and a temperature of 200°C. Amorphous films were then rapidly crystallized by opto-thermal annealing in a tungsten halogen lamp furnace at temperatures between 600°C and 800°C, for annealing periods ranging from 1 to 10 minutes, and with a temperature ramp rate of up to 100°C/s. Annealed films were characterized by examining the transformation from amorphous to nanocrystalline silicon by sheet resistivity measurements, Raman, and UV-VIS spectroscopy. Opto-thermal annealing of the heterojunction caused an increase in the UV reflectance intensity at a wavelength of 276 nm, and once complete crystallization had been achieved the UV reflectance intensity became constant. Further evidence of film crystallinity was determined by a clear shift in the Raman peak from 480 cm–1 to 520 cm–1. Sheet resistivities of 110–120 Ω/sq were measured and are suitable for solar cell fabrication without the need for a transparent conducting oxide. Ellipsometry of the nanocrystalline film was performed in the photon energy range from 1.5–6 eV. The film thickness, optical constants n and k, and bandgap, Eg, were determined by comparison of ellipsometric variables Δ and Y with a theoretical model of the heterojunction layers. The Effective Medium Approximation was used to create a model for the nanocrystalline layer consisting of both amorphous and crystalline silicon, and the Tauc Lorentz dispersion formula was used to model the amorphous component. A combination of 95% crystalline and 5% amorphous silicon was found to give the best agreement between experiment and model, with a goodness of fit of Χ2 = 1.3. The bandgap was estimated from the extinction coefficient, where k dropped to zero, corresponding to Eg = 1.21±0.04 eV. The heterojunction was characterized by fabricating diodes using photolithography followed by reactive ion etching for electrical isolation. Diode dimensions were 250 by 250 μm2, 500 by 500 μm2, and 2 by 2 mm2. Dark I-V measurements were performed at –40°C, 30°C, 60°C, 90°C, and 120°C. The affect of opto-thermal annealing was a reduction in reverse saturation current with increasing annealing temperature. Comparing the amorphous and nanocrystalline heterojunction diodes, the nanocrystalline reverse saturation current was more than two orders of magnitude lower. The heterojunction interface, a critical parameter for solar cell efficiency, was studied using AFORS-HET simulation software (Helmholtz Zentrum, Berlin) by analysis of capacitance as a function of temperature and frequency.

Keywords: nanocrystalline silicon, opto-thermal annealing, heterojunction, interface, capacitance-voltage